Sciweavers

3321 search results - page 499 / 665
» Performance of parallel computations with dynamic processor ...
Sort
View
IJAHUC
2007
99views more  IJAHUC 2007»
15 years 3 months ago
Simulation study of some PRMA-based protocols with channel reservation for data traffic
: Medium Access Control (MAC) and resource allocation are two challenging issues in mobile network. Packet reservation multiple access (PRMA) is considered as a promising MAC proto...
Xue Jun Li, Peter Han Joo Chong
HPCA
2003
IEEE
16 years 4 months ago
Tradeoffs in Buffering Memory State for Thread-Level Speculation in Multiprocessors
Thread-level speculation provides architectural support to aggressively run hard-to-analyze code in parallel. As speculative tasks run concurrently, they generate unsafe or specul...
María Jesús Garzarán, Milos P...
RT
2004
Springer
15 years 9 months ago
Realtime Caustics using Distributed Photon Mapping
With the advancements in realtime ray tracing and new global illumination algorithms we are now able to render the most important illumination effects at interactive rates. One of...
Johannes Günther, Ingo Wald, Philipp Slusalle...
122
Voted
CCGRID
2003
IEEE
15 years 9 months ago
Discretionary Caching for I/O on Clusters
I/O bottlenecks are already a problem in many largescale applications that manipulate huge datasets. This problem is expected to get worse as applications get larger, and the I/O ...
Murali Vilayannur, Anand Sivasubramaniam, Mahmut T...
HPCA
1999
IEEE
15 years 8 months ago
Impulse: Building a Smarter Memory Controller
Impulse is a new memory system architecture that adds two important features to a traditional memory controller. First, Impulse supports application-specific optimizations through...
John B. Carter, Wilson C. Hsieh, Leigh Stoller, Ma...