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111
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HPCA
2006
IEEE
16 years 3 months ago
Probabilistic counter updates for predictor hysteresis and stratification
Hardware counters are a fundamental building block of modern high-performance processors. This paper explores two applications of probabilistic counter updates, in which the outpu...
Nicholas Riley, Craig B. Zilles
CLUSTER
2006
IEEE
15 years 9 months ago
Cluster-based IP Router: Implementation and Evaluation
IP routers are now increasingly expected to do more than just traditional packet forwarding – they must be extensible as well as scalable. It is a challenge to design a router a...
Qinghua Ye, Mike H. MacGregor
145
Voted
IPPS
2006
IEEE
15 years 9 months ago
An extensible global address space framework with decoupled task and data abstractions
ions Sriram Krishnamoorthy½ Umit Catalyurek¾ Jarek Nieplocha¿ Atanas Rountev½ P. Sadayappan½ ½ Dept. of Computer Science and Engineering, ¾ Dept. of Biomedical Informatics T...
Sriram Krishnamoorthy, Ümit V. Çataly&...
HPDC
2008
IEEE
15 years 10 months ago
StoreGPU: exploiting graphics processing units to accelerate distributed storage systems
Today Graphics Processing Units (GPUs) are a largely underexploited resource on existing desktops and a possible costeffective enhancement to high-performance systems. To date, mo...
Samer Al-Kiswany, Abdullah Gharaibeh, Elizeu Santo...
129
Voted
ISCA
2011
IEEE
287views Hardware» more  ISCA 2011»
14 years 7 months ago
Scalable power control for many-core architectures running multi-threaded applications
Optimizing the performance of a multi-core microprocessor within a power budget has recently received a lot of attention. However, most existing solutions are centralized and cann...
Kai Ma, Xue Li, Ming Chen, Xiaorui Wang