3321 search results - page 545 / 665 » Performance of parallel computations with dynamic processor ... |
149
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SPAA
1993
ACM
15 years 7 months ago
1993
ACM
In this paper we introduce the ConSet communication model for distributed memory parallel computers. The communication needs of an application program can be satisfied by some ar...
153
Voted
HPCA
2011
IEEE
14 years 7 months ago
2011
IEEE
Future CMPs will combine many simple cores with deep cache hierarchies. With more cores, cache resources per core are fewer, and must be shared carefully to avoid poor utilization...
135
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EUROPAR
2001
Springer
15 years 8 months ago
2001
Springer
Operand bypass logic might be one of the critical structures for future microprocessors to achieve high clock speed. The delay of the logic imposes the execution time budget to be ...
123
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SIGMETRICS
2009
ACM
15 years 10 months ago
2009
ACM
We consider the problem of designing scheduling algorithms for the downlink of cellular wireless networks where bandwidth is partitioned into tens to hundreds of parallel channels...
181
Voted
RTSS
2007
IEEE
15 years 9 months ago
2007
IEEE
Recent technological advances have opened up several distributed real-time applications involving battery-driven embedded devices with local processing and wireless communication ...