3321 search results - page 63 / 665 » Performance of parallel computations with dynamic processor ... |
135
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ISPAN
2000
IEEE
15 years 7 months ago
2000
IEEE
We present new architectural concepts for uniprocessor designs that conform to the data-driven computation paradigm. Usage of our D2 -CPU (Data-Driven processor) follows the natura...
130
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ICPPW
2006
IEEE
15 years 9 months ago
2006
IEEE
Many important parallel applications require multiple flows of control to run on a single processor. In this paper, we present a study of four flow-of-control mechanisms: proces...
127
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IPPS
2000
IEEE
15 years 7 months ago
2000
IEEE
The newly introduced Microprocessor Architecture for Java Computing MAJC supports parallelism in a hierarchy of levels: multiprocessors on chip,vertical micro threading, instruct...
115
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CCGRID
2010
IEEE
15 years 4 months ago
2010
IEEE
We propose a dynamic auction mechanism to solve the allocation problem of computation capacity in the environment of cloud computing. Truth-telling property holds when we apply a s...
127
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ISPA
2007
Springer
15 years 9 months ago
2007
Springer
The Cell processor is a typical example of a heterogeneous multiprocessor-on-chip architecture that uses several levels of parallelism to deliver high performance. Closing the gap ...