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HPCA
2000
IEEE
15 years 7 months ago
PowerMANNA: A Parallel Architecture Based on the PowerPC MPC620
The paper presents PowerMANNA - a distributed-memory parallel computer system based on the 64-Bit PowerPC processor MPC620. The PowerMANNA node architecture supports all the sophi...
Peter M. Behr, S. Pletner, Angela C. Sodan
ICDE
2009
IEEE
114views Database» more  ICDE 2009»
16 years 5 months ago
On Efficient Query Processing of Stream Counts on the Cell Processor
In recent years, the sketch-based technique has been presented as an effective method for counting stream items on processors with limited storage and processing capabilities, such...
Dina Thomas, Rajesh Bordawekar, Charu C. Aggarwal,...
IPPS
2010
IEEE
15 years 1 months ago
Improving application performance with hardware data structures
Contemporary processors are becoming wider and more parallel. Thus developers must work hard to extract performance gains. An alternative computing paradigm is to use FPGA technolo...
Ravikesh Chandra, Oliver Sinnen
DAC
2005
ACM
16 years 4 months ago
Low power network processor design using clock gating
Abstract-- Network processors (NPs) have emerged as successful platforms to providing both high performance and flexibility in building powerful routers. Typical NPs incorporate mu...
Jia Yu, Jun Yang 0002, Laxmi N. Bhuyan, Yan Luo
ICCD
2005
IEEE
159views Hardware» more  ICCD 2005»
15 years 8 months ago
Architectural-Level Fault Tolerant Computation in Nanoelectronic Processors
Nanoelectronic devices are expected to have extremely high and variable fault rates; thus future processor architectures based on these unreliable devices need to be built with fa...
Wenjing Rao, Alex Orailoglu, Ramesh Karri