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ISVLSI
2005
IEEE
169views VLSI» more  ISVLSI 2005»
15 years 3 months ago
High Performance Array Processor for Video Decoding
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
HPDC
2010
IEEE
14 years 11 months ago
Data parallelism in bioinformatics workflows using Hydra
Large scale bioinformatics experiments are usually composed by a set of data flows generated by a chain of activities (programs or services) that may be modeled as scientific work...
Fábio Coutinho, Eduardo S. Ogasawara, Danie...
SOSP
2005
ACM
15 years 6 months ago
Hibernator: helping disk arrays sleep through the winter
Energy consumption has become an important issue in high-end data centers, and disk arrays are one of the largest energy consumers within them. Although several attempts have been...
Qingbo Zhu, Zhifeng Chen, Lin Tan, Yuanyuan Zhou, ...
ICEC
1994
82views more  ICEC 1994»
14 years 11 months ago
Improving Search by Incorporating Evolution Principles in Parallel Tabu Search
Combinatorial optimization problems require computing efforts which grow at least exponentially with the problem dimension. Therefore, the use of the remarkable power of massively...
Ivan De Falco, Renato Del Balio, Ernesto Tarantino...
PPOPP
2010
ACM
15 years 7 months ago
Featherweight X10: a core calculus for async-finish parallelism
We present a core calculus with two of X10's key constructs for parallelism, namely async and finish. Our calculus forms a convenient basis for type systems and static analys...
Jonathan K. Lee, Jens Palsberg