62 search results - page 11 / 13 » Performance optimal processor throttling under thermal const... |
IEEEPACT
2008
IEEE
15 years 4 months ago
2008
IEEE
The emergence of power as a first-class design constraint has fueled the proposal of a growing number of run-time power optimizations. Many of these optimizations trade-off power...
HPCA
2006
IEEE
15 years 10 months ago
2006
IEEE
Previous proposals for power-aware thread-level parallelism on chip multiprocessors (CMPs) mostly focus on multiprogrammed workloads. Nonetheless, parallel computation of a single...
TON
1998
14 years 9 months ago
1998
— The configuration of virtual path (VP) connection services is expected to play an important role in the operation of large-scale asynchronous transfer mode (ATM) networks. A m...
EMSOFT
2004
Springer
15 years 3 months ago
2004
Springer
Basic retiming is an algorithm originally developed for hardware optimization. Software pipelining is a technique proposed to increase instruction-level parallelism for parallel p...
IJES
2008
14 years 9 months ago
2008
: On-chipimplementationofmultiprocessorsystemsneedstoplanarisetheinterconnect networks onto the silicon floorplan. Compared with traditional ASIC/SoC architectures, Multiprocessor ...