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ISSS
2000
IEEE
109views Hardware» more  ISSS 2000»
15 years 1 months ago
FDRA: A Software-Pipelining Algorithm for Embedded VLIW Processors
The paper presents a novel software-pipelining algorithm suitable for optimizing compilers targeting embedded VLIW processors. The proposed algorithm is different from previous ap...
Cagdas Akturan, Margarida F. Jacome
CP
2001
Springer
15 years 2 months ago
Fast Optimal Instruction Scheduling for Single-Issue Processors with Arbitrary Latencies
Instruction scheduling is one of the most important steps for improving the performance of object code produced by a compiler. The local instruction scheduling problem is to nd a m...
Peter van Beek, Kent D. Wilken
IPPS
2005
IEEE
15 years 3 months ago
Reducing Power with Performance Constraints for Parallel Sparse Applications
Sparse and irregular computations constitute a large fraction of applications in the data-intensive scientific domain. While every effort is made to balance the computational wor...
Guangyu Chen, Konrad Malkowski, Mahmut T. Kandemir...
VLDB
2007
ACM
181views Database» more  VLDB 2007»
15 years 10 months ago
STAR: Self-Tuning Aggregation for Scalable Monitoring
We present STAR, a self-tuning algorithm that adaptively sets numeric precision constraints to accurately and efficiently answer continuous aggregate queries over distributed data...
Navendu Jain, Michael Dahlin, Yin Zhang, Dmitry Ki...
CF
2004
ACM
15 years 3 months ago
Combining compiler and runtime IPC predictions to reduce energy in next generation architectures
Next generation architectures will require innovative solutions to reduce energy consumption. One of the trends we expect is more extensive utilization of compiler information dir...
Saurabh Chheda, Osman S. Unsal, Israel Koren, C. M...