111 search results - page 10 / 23 » Performance pathologies in hardware transactional memory |
CODES
2011
IEEE
13 years 9 months ago
2011
IEEE
Two overriding concerns in the development of embedded MPSoCs are ease of programming and hardware complexity. In this paper we present SoC-TM, an integrated HW/SW solution for tr...
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ISCA
1993
IEEE
15 years 1 months ago
1993
IEEE
Advances in circuit and integration technology are continuously boosting the speed of microprocessors. One of the main challenges presented by such developments is the effective u...
ASPLOS
2006
ACM
15 years 3 months ago
2006
ACM
For transactional memory (TM) to achieve widespread acceptance, transactions should not be limited to the physical resources of any specific hardware implementation. TM systems s...
SBACPAD
2008
IEEE
15 years 3 months ago
2008
IEEE
Due to the advent of multi-core processors and the consequent need for better concurrent programming abstractions, new synchronization paradigms have emerged. A promising one, kno...
MICRO
2007
IEEE
15 years 3 months ago
2007
IEEE
Transactional Memory (TM) systems must track the read and write sets—items read and written during a transaction—to detect conflicts among concurrent transactions. Several TM...