111 search results - page 4 / 23 » Performance pathologies in hardware transactional memory |
86
Voted
SBACPAD
2008
IEEE
15 years 3 months ago
2008
IEEE
Transactional memory is emerging as a parallel programming paradigm for multi-core processors. Despite the recent interest in transactional memory, there has been no study to char...
79
Voted
ICS
2009
Tsinghua U.
14 years 7 months ago
2009
Tsinghua U.
In the search for high performance, most transactional memory (TM) systems execute atomic blocks concurrently and must thus be prepared for data conflicts. The TM system must then...
88
Voted
IPPS
2009
IEEE
15 years 4 months ago
2009
IEEE
Abstract—Widespread emergence of multicore processors will spur development of parallel applications, exposing programmers to degrees of hardware concurrency hitherto unavailable...
MICRO
2009
IEEE
15 years 4 months ago
2009
IEEE
Transactional Memory aims to provide a programming model that makes parallel programming easier. Hardware implementations of transactional memory (HTM) suffer from fewer overhead...
DAGSTUHL
2007
14 years 11 months ago
2007
Major hardware and software vendors are curious about transactional memory (TM), but are understandably cautious about committing to hardware changes. Our thesis is that deconstru...