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ARVLSI
2001
IEEE
289views VLSI» more  ARVLSI 2001»
15 years 3 months ago
A High-Performance 64-bit Adder Implemented in Output Prediction Logic
Output Prediction Logic (OPL) is a technique that can be applied to conventional CMOS logic families to obtain considerable speedups. When applied to static CMOS, OPL retains the ...
Sheng Sun, Larry McMurchie, Carl Sechen
WSC
2007
15 years 2 months ago
Predicting the impact on business performance of enhanced information system using business process simulation
The estimation of the impact on performance in business process (BP) by introducing an information system (IS) is an important practical problem in investment appraisal. This pape...
Yifei Tan, Soemon Takakuwa
ECIS
2004
15 years 1 months ago
Business alignment in the CRM domain: predicting CRM performance
In this paper we present a framework that aims to answer the central question why some organizations are successful in the CRM domain, while others are not. The framework is built...
Ronald Batenburg, Johan Versendaal
APSEC
2002
IEEE
15 years 4 months ago
A Predictive Performance Model to Evaluate the Contention Cost in Application Servers
In multi-tier enterprise systems, application servers are key components to implement business logic and provide services. To support a large number of simultaneous accesses from ...
Shiping Chen, Ian Gorton