2681 search results - page 396 / 537 » Performance results of running parallel applications on the ... |
WSC
1998
14 years 11 months ago
1998
This paper reports simulation methods and results for analyzing a self-adjusting Quality of Service (QoS) control scheme for multimedia/telecommunication systems based on resource...
IISWC
2008
IEEE
15 years 4 months ago
2008
IEEE
The design and evaluation of microprocessor architectures is a difficult and time-consuming task. Although small, handcoded microbenchmarks can be used to accelerate performance e...
ARITH
2001
IEEE
15 years 1 months ago
2001
IEEE
The Instruction Set Architecture (ISA) of a programmable processor is the native languageof the machine. It defines the set of operations and resourcesthat are optimized for that ...
ICDE
2011
IEEE
14 years 1 months ago
2011
IEEE
MapReduce is a computing paradigm that has gained a lot of popularity as it allows non-expert users to easily run complex analytical tasks at very large-scale. At such scale, task...
ICC
2009
IEEE
15 years 4 months ago
2009
IEEE
— In this paper, we propose a novel low complexity soft-in soft-out (SISO) equalizer using the Markov chain Monte Carlo (MCMC) technique. Direct application of MCMC to SISO equal...