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EUROPAR
2009
Springer
15 years 4 months ago
A Case Study of Communication Optimizations on 3D Mesh Interconnects
Optimal network performance is critical to efficient parallel scaling for communication-bound applications on large machines. With wormhole routing, no-load latencies do not increa...
Abhinav Bhatele, Eric J. Bohm, Laxmikant V. Kal&ea...
MICRO
1998
IEEE
79views Hardware» more  MICRO 1998»
15 years 2 months ago
Widening Resources: A Cost-effective Technique for Aggressive ILP Architectures
The inherent instruction-level parallelism (ILP) of current applications (specially those based on floating point computations) has driven hardware designers and compilers writers...
David López, Josep Llosa, Mateo Valero, Edu...
DAC
2008
ACM
15 years 10 months ago
Daedalus: toward composable multimedia MP-SoC design
Daedalus is a system-level design flow for the design of multiprocessor system-on-chip (MP-SoC) based embedded multimedia systems. It offers a fully integrated tool-flow in which ...
Hristo Nikolov, Mark Thompson, Todor Stefanov, And...
LCPC
2009
Springer
15 years 2 months ago
Loop Transformation Recipes for Code Generation and Auto-Tuning
Abstract. In this paper, we describe transformation recipes, which provide a high-level interface to the code transformation and code generation capability of a compiler. These rec...
Mary W. Hall, Jacqueline Chame, Chun Chen, Jaewook...
MODELS
2009
Springer
15 years 2 months ago
On-the-Fly Construction, Correctness and Completeness of Model Transformations Based on Triple Graph Grammars
Triple graph grammars (TGGs) are a formal and intuitive concept for the specification of model transformations. Their main advantage is an automatic derivation of operational rule...
Hartmut Ehrig, Claudia Ermel, Frank Hermann, Ulrik...