30 search results - page 1 / 6 » Performance scalability of decoupled software pipelining |
97
Voted
TACO
2008
15 years 3 months ago
2008
130
Voted
CGO
2008
IEEE
15 years 10 months ago
2008
IEEE
In recent years, the microprocessor industry has embraced chip multiprocessors (CMPs), also known as multi-core architectures, as the dominant design paradigm. For existing and ne...
115
Voted
CGO
2010
IEEE
15 years 10 months ago
2010
IEEE
Decoupled Software Pipelining (DSWP) is one approach to automatically extract threads from loops. It partitions loops into long-running threads that communicate in a pipelined man...
133
click to vote
MICRO
2005
IEEE
15 years 9 months ago
2005
IEEE
Until recently, a steadily rising clock rate and other uniprocessor microarchitectural improvements could be relied upon to consistently deliver increasing performance for a wide ...
152
Voted
EGH
2011
Springer
14 years 3 months ago
2011
Springer
In this paper, we implement an efficient, completely software-based graphics pipeline on a GPU. Unlike previous approaches, we obey ordering constraints imposed by current graphi...