458 search results - page 17 / 92 » Performance study of mapping irregular computations on GPUs |
ICCAD
1994
IEEE
15 years 1 months ago
1994
IEEE
We consider the problem of performance driven lookup-table (LUT) based technology mapping for FPGAs using a general delay model. In the general delay model, each interconnection e...
102
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WWW
2008
ACM
15 years 10 months ago
2008
ACM
Web search engines are facing formidable performance challenges due to data sizes and query loads. The major engines have to process tens of thousands of queries per second over t...
75
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DAC
2001
ACM
15 years 10 months ago
2001
ACM
In this paper, we study the problem of performance-driven multi-level circuit clustering with application to hierarchical FPGA designs. We first show that the performance-driven m...
68
Voted
DAC
2005
ACM
15 years 10 months ago
2005
ACM
This paper attempts to quantify the optimality of FPGA technology mapping algorithms. We develop an algorithm, based on Boolean satisfiability (SAT), that is able to map a small s...
CVIU
2007
14 years 9 months ago
2007
A maximum a posterior probability zero disparity filter (MAP ZDF) ensures coordinated stereo fixation upon an arbitrarily moving, rotating, re-configuring hand, performing mark...