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» Performance study of mapping irregular computations on GPUs
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DAC
2007
ACM
15 years 10 months ago
Reducing Data-Memory Footprint of Multimedia Applications by Delay Redistribution
It is now common for multimedia applications to be partitioned and mapped onto multiple processing elements of a system-on-chip architecture. An important design constraint in suc...
Balaji Raman, Samarjit Chakraborty, Wei Tsang Ooi,...
92
Voted
LCTRTS
2010
Springer
15 years 4 months ago
Design exploration and automatic generation of MPSoC platform TLMs from Kahn Process Network applications
With increasingly more complex Multi-Processor Systems on Chip (MPSoC) and shortening time-to- market projections, Transaction Level Modeling and Platform Aware Design are seen as...
Ines Viskic, Lochi Lo Chi Yu Lo, Daniel Gajski
IPPS
2003
IEEE
15 years 2 months ago
Multi-Paradigm Framework for Parallel Image Processing
A software framework for the parallel execution of sequential programs using C++ classes is presented. The functional language Concurrent ML is used to implement the underlying ha...
David J. Johnston, Martin Fleury, Andy C. Downton
64
Voted
CONEXT
2008
ACM
14 years 11 months ago
Online estimation of RF interference
Increased AP density in enterprise WLANs leads to increasing RF interference and decreasing performance. An important step towards mitigating this problem is to construct precise ...
Nabeel Ahmed, Usman Ismail, Srinivasan Keshav, Kon...
IISWC
2009
IEEE
15 years 4 months ago
SD-VBS: The San Diego Vision Benchmark Suite
—In the era of multi-core, computer vision has emerged as an exciting application area which promises to continue to drive the demand for both more powerful and more energy effi...
Sravanthi Kota Venkata, Ikkjin Ahn, Donghwan Jeon,...