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» Performance under Failures of DAG-based Parallel Computing
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GLVLSI
2007
IEEE
194views VLSI» more  GLVLSI 2007»
15 years 6 months ago
Probabilistic maximum error modeling for unreliable logic circuits
Reliability modeling and evaluation is expected to be one of the major issues in emerging nano-devices and beyond 22nm CMOS. Such devices would have inherent propensity for gate f...
Karthikeyan Lingasubramanian, Sanjukta Bhanja
COLCOM
2005
IEEE
15 years 8 months ago
Matching distributed systems to their environment using dissipative structures
In contrast to a large body of theoretical work on computer systems, distributed systems are not idealised constructions, unconstrained by physical world limitations. They must be...
Jim Dowling, Dominik Dahlem, Jan Sacha
HPCA
1997
IEEE
15 years 6 months ago
ATM and Fast Ethernet Network Interfaces for User-Level Communication
Fast Ethernet and ATM are two attractive network technologies for interconnecting workstation clusters for parallel and distributed computing. This paper compares network interfac...
Matt Welsh, Anindya Basu, Thorsten von Eicken
HPCA
2011
IEEE
14 years 6 months ago
Archipelago: A polymorphic cache design for enabling robust near-threshold operation
Extreme technology integration in the sub-micron regime comes with a rapid rise in heat dissipation and power density for modern processors. Dynamic voltage scaling is a widely us...
Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott ...
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CLUSTER
2011
IEEE
14 years 2 months ago
Incorporating Network RAM and Flash into Fast Backing Store for Clusters
—We present Nswap2L, a fast backing storage system for general purpose clusters. Nswap2L implements a single device interface on top of multiple heterogeneous physical storage de...
Tia Newhall, Douglas Woos