70 search results - page 5 / 14 » Performance-Driven Interconnect Global Routing |
FPL
2009
Springer
13 years 11 months ago
2009
Springer
Spatially-tiled architectures, such as Coarse-Grained Reconfigurable Arrays (CGRAs), are powerful architectures for accelerating applications in the digital-signal processing, em...
DATE
2003
IEEE
13 years 11 months ago
2003
IEEE
We present a framework that considers global routing, repeater insertion, and flip-flop relocation for early interconnect planning. We formulate the interconnect retiming and ...
DAC
2007
ACM
14 years 7 months ago
2007
ACM
Abstract-- In nanometer-scale VLSI technologies, several interconnect issues like routing congestion and interconnect delay have become the main concerns in placement. However, all...
ASPDAC
2005
ACM
13 years 8 months ago
2005
ACM
Power has become an increasingly important design constraint for FPGAs in nanometer technologies, and global interconnects should be the focus of FPGA power reduction as they cons...
TVLSI
2010
13 years 29 days ago
2010
A new inter-processor communication architecture for chip multiprocessors is proposed which has a low area cost, flexible routing capability, and supports globally asynchronous loc...