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ISCAS
2006
IEEE
112views Hardware» more  ISCAS 2006»
15 years 6 months ago
Towards an optimised VLSI design algorithm for the constant matrix multiplication problem
The efficient design of multiplierless implementa- The goal is to find the optimal sub-expressions across all N dot tions of constant matrix multipliers is challenged by the huge p...
Andrew Kinane, Valentin Muresan, Noel E. O'Connor
104
Voted
ATVA
2005
Springer
132views Hardware» more  ATVA 2005»
15 years 6 months ago
Flat Counter Automata Almost Everywhere!
Abstract. This paper argues that flatness appears as a central notion in the verification of counter automata. A counter automaton is called flat when its control graph can be ...
Jérôme Leroux, Grégoire Sutre
83
Voted
ICRA
2003
IEEE
93views Robotics» more  ICRA 2003»
15 years 6 months ago
Design of all-accelerometer inertial measurement unit for tremor sensing in hand-held microsurgical instrument
– We present the design of an all-accelerometer inertial measurement unit (IMU). The IMU forms part of an intelligent hand-held microsurgical instrument that senses its own motio...
Wei Tech Ang, Pradeep K. Khosla, Cameron N. Rivier...
108
Voted
FPGA
2003
ACM
116views FPGA» more  FPGA 2003»
15 years 6 months ago
Hardware-assisted simulated annealing with application for fast FPGA placement
To truly exploit FPGAs for rapid turn-around development and prototyping, placement times must be reduced to seconds; latebound, reconfigurable computing applications may demand p...
Michael G. Wrighton, André DeHon
FPL
2009
Springer
113views Hardware» more  FPL 2009»
15 years 5 months ago
Static versus scheduled interconnect in Coarse-Grained Reconfigurable Arrays
Spatially-tiled architectures, such as Coarse-Grained Reconfigurable Arrays (CGRAs), are powerful architectures for accelerating applications in the digital-signal processing, em...
Brian Van Essen, Aaron Wood, Allan Carroll, Stephe...