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DSD
2006
IEEE
99views Hardware» more  DSD 2006»
15 years 5 months ago
Flexible Bus and NoC Performance Analysis with Configurable Synthetic Workloads
We present a flexible method for bus and network on chip performance analysis, which is based on the adaptation of workload models to resemble various applications. Our analysis m...
Rikard Thid, Ingo Sander, Axel Jantsch
84
Voted
CODES
2008
IEEE
15 years 3 months ago
A performance-oriented hardware/software partitioning for datapath applications
This article proposes a hardware/software partitioning method targeted to performance-constrained systems for datapath applications. Exploiting a platform based design, a Timed Pe...
Laura Frigerio, Fabio Salice
ISNN
2005
Springer
15 years 7 months ago
A Novel Solid Neuron-Network Chip Based on Both Biological and Artificial Neural Network Theories
Built on the theories of biological neural network, artificial neural network methods have shown many significant advantages. However, the memory space in an artificial neural chip...
Zihong Liu, Zhihua Wang, Guolin Li, Zhiping Yu
136
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INFORMS
1998
142views more  INFORMS 1998»
15 years 1 months ago
Distributed State Space Generation of Discrete-State Stochastic Models
High-level formalisms such as stochastic Petri nets can be used to model complex systems. Analysis of logical and numerical properties of these models often requires the generatio...
Gianfranco Ciardo, Joshua Gluckman, David M. Nicol
IWANN
2009
Springer
15 years 8 months ago
Design of a Snort-Based Hybrid Intrusion Detection System
J. Gómez, Consolación Gil, N. Padill...