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ICANN
2005
Springer
15 years 7 months ago
A Real-Time, FPGA Based, Biologically Plausible Neural Network Processor
Abstract. A real-time, large scale, leaky-integrate-and-fire neural network processor realized using FPGA is presented. This has been designed, as part of a collaborative project,...
Martin J. Pearson, Ian Gilhespy, Kevin N. Gurney, ...
FLAIRS
2004
15 years 3 months ago
Iterative Improvement of Neural Classifiers
A new objective function for neural net classifier design is presented, which has more free parameters than the classical objective function. An iterative minimization technique f...
Jiang Li, Michael T. Manry, Li-min Liu, Changhua Y...
CPE
1997
Springer
79views Hardware» more  CPE 1997»
15 years 6 months ago
Storage Alternatives for Large Structured State Spaces
We consider the problem of storing and searching a large state space obtained from a high-level model such as a queueing network or a Petri net. After reviewing the traditional te...
Gianfranco Ciardo, Andrew S. Miner
121
Voted
ICECCS
2005
IEEE
92views Hardware» more  ICECCS 2005»
15 years 7 months ago
Secure Software Architectures Design by Aspect Orientation
Security design at architecture level is critical to achieve high assurance software systems. However, most security design techniques for software architectures were in ad hoc fa...
Huiqun Yu, Dongmei Liu, Xudong He, Li Yang, Shu Ga...
ICCAD
1999
IEEE
99views Hardware» more  ICCAD 1999»
15 years 6 months ago
FunState - an internal design representation for codesign
In this paper, an internal design model called FunState (functions driven by state machines) is presented that enables the representation of different types of system components a...
Lothar Thiele, Karsten Strehl, Dirk Ziegenbein, Ro...