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1998
IEEE
91views Hardware» more  DATE 1998»
15 years 5 months ago
Interconnect Tuning Strategies for High-Performance Ics
Interconnect tuning is an increasingly critical degree of freedom in the physical design of high-performance VLSI systems. By interconnect tuning, we refer to the selection of lin...
Andrew B. Kahng, Sudhakar Muddu, Egino Sarto, Rahu...
HPCA
1998
IEEE
15 years 5 months ago
PRISM: An Integrated Architecture for Scalable Shared Memory
This paper describes PRISM, a distributed sharedmemory architecture that relies on a tightly integrated hardware and operating system design for scalable and reliable performance....
Kattamuri Ekanadham, Beng-Hong Lim, Pratap Pattnai...
ICNP
1998
IEEE
15 years 5 months ago
Darwin: Customizable Resource Management for Value-Added Network Services
The Internet is rapidly changing from a set of wires and switches that carry packets into a sophisticated infrastructure that delivers a set of complex value-added services to end...
Prashant R. Chandra, Allan Fisher, Corey Kosak, T....
INFOCOM
1998
IEEE
15 years 5 months ago
Implementing Distributed Packet Fair Queueing in a Scalable Switch Architecture
To support the Internet's explosive growth and expansion into a true integrated services network, there is a need for cost-effective switching technologies that can simultaneo...
Donpaul C. Stephens, Hui Zhang
CADE
1998
Springer
15 years 5 months ago
System Description: card TAP: The First Theorem Prover on a Smart Card
Abstract. We present the first implementation of a theorem prover running on a smart card. The prover is written in Java and implements a dual tableau calculus. Due to the limited ...
Rajeev Goré, Joachim Posegga, Andrew Slater...
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