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PDCAT
2007
Springer
15 years 9 months ago
A Distributed Virtual Machine for Parallel Graph Reduction
We present the architecture of nreduce, a distributed virtual machine which uses parallel graph reduction to run programs across a set of computers. It executes code written in a ...
Peter M. Kelly, Paul D. Coddington, Andrew L. Wend...
PPPJ
2006
ACM
15 years 9 months ago
Experiences with the development of a reverse engineering tool for UML sequence diagrams: a case study in modern Java developmen
The development of a tool for reconstructing UML sequence diagrams from executing Java programs is a challenging task. We implemented such a tool designed to analyze any kind of J...
Matthias Merdes, Dirk Dorsch
TPHOL
2003
IEEE
15 years 8 months ago
MetaPRL - A Modular Logical Environment
MetaPRL is the latest system to come out of over twenty five years of research by the Cornell PRL group. While initially created at Cornell, MetaPRL is currently a collaborative p...
Jason Hickey, Aleksey Nogin, Robert L. Constable, ...
CHARME
2001
Springer
98views Hardware» more  CHARME 2001»
15 years 7 months ago
Hardware Synthesis Using SAFL and Application to Processor Design
Abstract. We survey the work done so far in the FLaSH project (Functional Languages for Synthesising Hardware) in which the core ideas are (i) using a functional language SAFL to d...
Alan Mycroft, Richard Sharp
CONCUR
1999
Springer
15 years 7 months ago
From Synchrony to Asynchrony
Abstract. We present an in-depth discussion of the relationships between synchrony and asynchrony. Simple models of both paradigms are presented, and we state theorems which guaran...
Albert Benveniste, Benoît Caillaud, Paul Le ...