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» Pipeline Timing Analysis Using a Trace-Driven Simulator
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82
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NOSSDAV
2004
Springer
15 years 2 months ago
Reduced state fair queuing for edge and core routers
Despite many years of research, fair queuing still faces a number of implementation challenges in high speed routers. In particular, in spite of proposals such as DiffServ, the st...
Ramana Rao Kompella, George Varghese
61
Voted
SIAMSC
2008
129views more  SIAMSC 2008»
14 years 9 months ago
Bottom-Up Construction and 2: 1 Balance Refinement of Linear Octrees in Parallel
Abstract. In this article, we propose new parallel algorithms for the construction and 2:1 balance refinement of large linear octrees on distributed memory machines. Such octrees a...
Hari Sundar, Rahul S. Sampath, George Biros
BMCBI
2005
97views more  BMCBI 2005»
14 years 9 months ago
Evolutionary distance estimation and fidelity of pair wise sequence alignment
Background: Evolutionary distances are a critical measure in comparative genomics and molecular evolutionary biology. A simulation study was used to examine the effect of alignmen...
Michael S. Rosenberg
176
Voted
GIS
2005
ACM
15 years 10 months ago
Contraflow network reconfiguration for evacuation planning: a summary of results
Contraflow, or lane reversal, is a way of increasing outbound capacity of a real network by reversing the direction of inbound roads during evacuations. The contraflow is consider...
Sangho Kim, Shashi Shekhar
82
Voted
IISWC
2008
IEEE
15 years 3 months ago
On the representativeness of embedded Java benchmarks
— Java has become one of the predominant languages for embedded and mobile platforms due to its architecturally neutral design, portability, and security. But Java execution in t...
Ciji Isen, Lizy Kurian John, Jung Pil Choi, Hyo Ju...