1189 search results - page 49 / 238 » Pipeline Timing Analysis Using a Trace-Driven Simulator |
136
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ISCA
1997
IEEE
15 years 8 months ago
1997
IEEE
Improvements in main memory speeds have not kept pace with increasing processor clock frequency and improved exploitation of instruction-level parallelism. Consequently, the gap b...
127
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DATE
2007
IEEE
15 years 10 months ago
2007
IEEE
Recently there has been considerable interest in incorporating timing effects of microarchitectural features of processors (e.g. caches and pipelines) into the schedulability anal...
131
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VTC
2008
IEEE
15 years 10 months ago
2008
IEEE
— In this paper, we provide a framework for the asymptotic performance analysis of space–time codes (STCs) in correlated Ricean fading and non–Gaussian noise and interference...
111
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ITC
1999
IEEE
15 years 8 months ago
1999
IEEE
Transient Signal Analysis is a digital device testing method that is based on the analysis of voltage transients at multiple test points. The power supply transient signals of an ...
147
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WSC
1998
15 years 5 months ago
1998
Distributed synchronization for parallel simulation is generally classified as being either optimistic or conservative. While considerable investigations have been conducted to an...