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ISCA
2002
IEEE
95views Hardware» more  ISCA 2002»
15 years 8 months ago
An Instruction Set and Microarchitecture for Instruction Level Distributed Processing
An instruction set architecture (ISA) suitable for future microprocessor design constraints is proposed. The ISA has hierarchical register files with a small number of accumulator...
Ho-Seop Kim, James E. Smith
212
Voted
ICCAD
1999
IEEE
109views Hardware» more  ICCAD 1999»
15 years 8 months ago
Transient sensitivity computation for transistor level analysis and tuning
This paper presents a general method for computing transient sensitivities using both the direct and adjoint methods in event driven controlled explicit simulation algorithms that...
Tuyen V. Nguyen, Peter O'Brien, David W. Winston
DAC
2005
ACM
16 years 4 months ago
A low latency router supporting adaptivity for on-chip interconnects
The increased deployment of System-on-Chip designs has drawn attention to the limitations of on-chip interconnects. As a potential solution to these limitations, Networks-on -Chip...
Jongman Kim, Dongkook Park, Theo Theocharides, Nar...
ISCC
2008
IEEE
15 years 10 months ago
Scheduling high-rate sessions in Fractional Lambda Switching networks: Algorithm and analysis
This work addresses the high-rate session scheduling problem in Fractional Lambda Switching (FλS) networks. With its global phase synchronization and pipeline forwarding (PF) ope...
Thu-Huong Truong, Mario Baldi, Yoram Ofek
144
Voted
HAPTICS
2007
IEEE
15 years 10 months ago
JND Analysis of Texture Roughness Perception using a Magnetic Levitation Haptic Device
This paper describes the use of a magnetic levitation haptic device (MLHD) to study the psychophysics of texture roughness. Studies of texture roughness perception performed using...
Bertram Unger, Ralph L. Hollis, Roberta L. Klatzky