1189 search results - page 99 / 238 » Pipeline Timing Analysis Using a Trace-Driven Simulator |
130
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ICNP
2003
IEEE
15 years 9 months ago
2003
IEEE
This paper presents an analytical model to compute the average service time and jitter experienced by a packet when transmitted in a saturated IEEE 802.11 ad hoc network. In contr...
110
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DAC
2003
ACM
16 years 5 months ago
2003
ACM
Verification of system designs continues to be a major challenge today. Simulation remains the primary tool for making sure that implementations perform as they should. We present...
140
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FPL
2007
Springer
15 years 8 months ago
2007
Springer
Recently, there is a surge of interests in using FPGAs for computer architecture research including applications from emulating and analyzing a new platform to accelerating microa...
179
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VLSID
2005
IEEE
16 years 4 months ago
2005
IEEE
Abstract--Power analysis early in the design cycle is critical for the design of lowpower systems. With the move to system-level specifications and design methodologies, there has ...
142
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ICC
2007
IEEE
15 years 10 months ago
2007
IEEE
--- In this paper, a novel third-order Phase Lock Loop (PLL) is proposed for the timing recovery in MIMO-OFDM systems. It differentiates from conventional timing recovery algorithm...