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FCCM
1999
IEEE
122views VLSI» more  FCCM 1999»
15 years 6 months ago
Safe and Protected Execution for the Morph/AMRM Reconfigurable Processor
Technology scaling of CMOS processes brings relatively faster transistors (gates) and slower interconnects (wires), making viable the addition of reconfigurability to increase per...
Andrew A. Chien, Jay H. Byun
FCCM
1999
IEEE
146views VLSI» more  FCCM 1999»
15 years 6 months ago
Sepia: Scalable 3D Compositing Using PCI Pamette
We have implemented an image combining architecture that allows distributed rendering of a partitioned data set at interactive rates. The architecture achieves real-time frame rat...
Laurent Moll, Mark Shand, Alan Heirich
DATE
1998
IEEE
116views Hardware» more  DATE 1998»
15 years 6 months ago
VLSI Architecture for Lossless Compression of Medical Images Using the Discrete Wavelet Transform
This paper presents a VLSI Architecture to implement the forward and inverse 2-D Discrete Wavelet Transform (FDWT/IDWT), to compress medical images for storage and retrieval. Loss...
Isidoro Urriza, José I. Artigas, José...
PLILP
1998
Springer
15 years 6 months ago
Compiling Erlang to Scheme
The programming languages Erlang and Scheme have many common features, yet the performance of the current implementations of Erlang appears to be below that of good implementations...
Marc Feeley, Martin Larose
CHES
2003
Springer
146views Cryptology» more  CHES 2003»
15 years 5 months ago
Efficient Implementation of Rijndael Encryption in Reconfigurable Hardware: Improvements and Design Tradeoffs
Abstract. Performance evaluation of the Advanced Encryption Standard candidates has led to intensive study of both hardware and software implementations. However, although plentifu...
François-Xavier Standaert, Gaël Rouvro...