— In this paper, we present two designs for CMOS comparators: one which is targeted for high-speed applications and another for low-power applications. Additionally, we present h...
Eric Menendez, Dumezie Maduike, Rajesh Garg, Sunil...
Translation validators are static analyzers that attempt to verify that program transformations preserve semantics. Normalizing translation validators do so by trying to match the...
Jean-Baptiste Tristan, Paul Govereau, Greg Morrise...
The number of pipeline stages separating dynamic instruction scheduling from instruction execution has increased considerably in recent out-of-order microprocessor implementations...
Abstract— Design variability due to within-die and die-todie process variations has the potential to significantly reduce the maximum operating frequency and the effective yield...
- We propose a near optimal hardware architecture for deblocking filter in H.264/MPEG-4 AVC. We propose a novel filtering order and a data reuse strategy that result in significant...