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GRAPHICSINTERFACE
2007
15 years 1 months ago
On visual quality of optimal 3D sampling and reconstruction
This paper presents a user study of the visual quality of an imaging pipeline employing the optimal body-centered cubic (BCC) sampling lattice. We provide perceptual evidence supp...
Tai Meng, Benjamin Smith 0002, Alireza Entezari, A...
ICDE
2009
IEEE
198views Database» more  ICDE 2009»
16 years 1 months ago
Double Index NEsted-Loop Reactive Join for Result Rate Optimization
Adaptive join algorithms have recently attracted a lot of attention in emerging applications where data is provided by autonomous data sources through heterogeneous network enviro...
Mihaela A. Bornea, Vasilis Vassalos, Yannis Kotidi...
APCCAS
2006
IEEE
271views Hardware» more  APCCAS 2006»
15 years 5 months ago
Leakage Optimized DECAP Design for FPGAs
— On-chip decoupling capacitors (Decaps) are widely used to mitigate on-chip power supply noise. At and below 100nm on-chip decaps face leakage and area overhead problems associa...
Balaji Vaidyanathan, Suresh Srinivasan, Yuan Xie, ...
APCSAC
2006
IEEE
15 years 5 months ago
Using Branch Prediction Information for Near-Optimal I-Cache Leakage
This paper describes a new on-demand wakeup prediction policy for instruction cache leakage control that achieves better leakage savings than prior policies, and avoids the perform...
Sung Woo Chung, Kevin Skadron
IPPS
2006
IEEE
15 years 5 months ago
Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...