79 search results - page 1 / 16 » Place and Route for Secure Standard Cell Design |
74
Voted
CARDIS
2004
Springer
15 years 4 months ago
2004
Springer
62
Voted
DATE
2005
IEEE
15 years 4 months ago
2005
IEEE
In this paper, we present an experimental integrated platform for the research, development and evaluation of new VLSI back-end algorithms and design flows. Interconnect scaling ...
101
Voted
ISPD
1997
ACM
15 years 3 months ago
1997
ACM
Advances in fabrication technology have resulted in a continual shrinkage of device dimensions. This has resulted in smaller device delays, greater resistance along interconnect w...
63
Voted
ICCAD
1994
IEEE
15 years 3 months ago
1994
IEEE
ARITH
1999
IEEE
15 years 3 months ago
1999
IEEE
The floating-point unit of a S/390 CMOS microprocessor is described. It contains a 116 bit fraction dataflow for addition and subtraction and a 64 bit-wide multiplier. Besides the...