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» Planning as an architectural control mechanism
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VLSID
2009
IEEE
108views VLSI» more  VLSID 2009»
16 years 1 months ago
Metric Based Multi-Timescale Control for Reducing Power in Embedded Systems
Abstract--Digital control for embedded systems often requires low-power, hard real-time computation to satisfy high control-loop bandwidth, low latency, and low-power requirements....
Forrest Brewer, João Pedro Hespanha, Nitin ...
141
Voted
ICDCS
1999
IEEE
15 years 5 months ago
HiFi: A New Monitoring Architecture for Distributed Systems Management
With the increasing complexity of large-scale distributed (LSD) systems, an efficient monitoring mechanism has become an essential service for improving the performance and reliab...
Ehab S. Al-Shaer, Hussein M. Abdel-Wahab, Kurt Mal...
111
Voted
WORDS
2005
IEEE
15 years 6 months ago
Virtual Networks in an Integrated Time-Triggered Architecture
Depending on the physical structuring of large distributed safety-critical real-time systems, one can distinguish federated and integrated system architectures. This paper investi...
Roman Obermaisser, Philipp Peti, Hermann Kopetz
FPL
2004
Springer
110views Hardware» more  FPL 2004»
15 years 6 months ago
Versatile Imaging Architecture Based on a System on Chip
Abstract. In this paper, a novel architecture dedicated to image processing is presented. The most original aspect of the approach is the use of a System On Chip implemented in a F...
Pierre Chalimbaud, François Berry
MICRO
2003
IEEE
128views Hardware» more  MICRO 2003»
15 years 5 months ago
IPStash: a Power-Efficient Memory Architecture for IP-lookup
Abstract—High-speed routers often use commodity, fully-associative, TCAMs (Ternary Content Addressable Memories) to perform packet classification and routing (IP lookup). We prop...
Stefanos Kaxiras, Georgios Keramidas