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» Planning as an architectural control mechanism
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ISCA
2011
IEEE
365views Hardware» more  ISCA 2011»
14 years 4 months ago
Kilo-NOC: a heterogeneous network-on-chip architecture for scalability and service guarantees
Today’s chip-level multiprocessors (CMPs) feature up to a hundred discrete cores, and with increasing levels of integration, CMPs with hundreds of cores, cache tiles, and specia...
Boris Grot, Joel Hestness, Stephen W. Keckler, Onu...
104
Voted
WWW
2007
ACM
16 years 1 months ago
Mobile shopping assistant: integration of mobile applications and web services
The goal of this poster is to describe our implementation of a new architecture enabling efficient integration between mobile phone applications and Web Services. Using this archi...
Huaigu Wu, Yuri Natchetoi
95
Voted
ICCD
2002
IEEE
122views Hardware» more  ICCD 2002»
15 years 9 months ago
Using Offline and Online BIST to Improve System Dependability - The TTPC-C Example
Fault-tolerant distributed real-time systems are presently facing a lot of new challenges. Although many techniques provide effective masking of node failures on the architectural...
Andreas Steininger, Johann Vilanek
80
Voted
DFT
2007
IEEE
86views VLSI» more  DFT 2007»
15 years 7 months ago
Production Yield and Self-Configuration in the Future Massively Defective Nanochips
We address two problems in this work, namely, 1) the resilience challenge in the future chips made up of massively defective nanoelements and organized in replicative multicore ar...
Piotr Zajac, Jacques Henri Collet
109
Voted
IFIP
1998
Springer
15 years 4 months ago
Migrating Objects in Electronic Commerce Applications
Electronic Commerce is a field of application that is distributed by nature where different parties share information and work concurrently and cooperatively on objects, potential...
Marko Boger