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» Plug-and-Play Architectural Design and Verification
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DAC
2002
ACM
15 years 10 months ago
Hole analysis for functional coverage data
One of the main goals of coverage tools is to provide the user with informative presentation of coverage information. Specifically, information on large, cohesive sets of uncovere...
Oded Lachish, Eitan Marcus, Shmuel Ur, Avi Ziv
SIPS
2006
IEEE
15 years 3 months ago
Architecture-Aware LDPC Code Design for Software Defined Radio
Low-Density Parity-Check (LDPC) codes have been adopted in the physical layer of many communication systems because of their superior performance. The direct implementation of the...
Yuming Zhu, Chaitali Chakrabarti
ICCD
2008
IEEE
119views Hardware» more  ICCD 2008»
15 years 6 months ago
Hierarchical simulation-based verification of Anton, a special-purpose parallel machine
—One of the major design verification challenges in the development of Anton, a massively parallel special-purpose machine for molecular dynamics, was to provide evidence that co...
John P. Grossman, John K. Salmon, Richard C. Ho, D...
FDL
2003
IEEE
15 years 2 months ago
Using Rewriting-Logic Notation for Funcional Verification in Data-Stream Based Reconfigurable Computing
Reconfigurable Systolic Arrays are a generalization of Systolic Arrays where node operations and interconnections can be redefined even at run time. This flexibility increases the...
Mauricio Ayala-Rincón, Ricardo P. Jacobi, C...
67
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DAC
1999
ACM
15 years 10 months ago
Subwavelength Lithography and Its Potential Impact on Design and EDA
This tutorial paper surveys the potential implications of subwavelength optical lithography for new tools and flows in the interface between layout design and manufacturability. W...
Andrew B. Kahng, Y. C. Pati