Sciweavers

351 search results - page 12 / 71
» Plug-and-Play Architectural Design and Verification
Sort
View
74
Voted
DATE
2009
IEEE
107views Hardware» more  DATE 2009»
15 years 4 months ago
Learning early-stage platform dimensioning from late-stage timing verification
— Today's innovations in the automotive sector are, to a great extent, based on electronics. The increasing integration complexity and stringent cost reduction goals turn E/...
Kai Richter, Marek Jersak, Rolf Ernst
SIGSOFT
2005
ACM
15 years 10 months ago
Dynamically discovering architectures with DiscoTect
One of the challenges for software architects is ensuring that an implemented system faithfully represents its architecture. We describe and demonstrate a tool, called DiscoTect, ...
Bradley R. Schmerl, David Garlan, Hong Yan
ICSE
2008
IEEE-ACM
15 years 9 months ago
An ontology-driven software architecture evaluation method
Software architecture evaluation has a crucial role in the life cycle of software intensive systems. In this paper we propose an approach to empower a software architecture evalua...
Aida Erfanian, Fereidoun Shams Aliee
DAC
2005
ACM
15 years 10 months ago
A new canonical form for fast boolean matching in logic synthesis and verification
? An efficient and compact canonical form is proposed for the Boolean matching problem under permutation and complementation of variables. In addition an efficient algorithm for co...
Afshin Abdollahi, Massoud Pedram
VLSID
2007
IEEE
97views VLSI» more  VLSID 2007»
15 years 10 months ago
Efficient Microprocessor Verification using Antecedent Conditioned Slicing
We present a technique for automatic verification of pipelined microprocessors using model checking. Antecedent conditioned slicing is an efficient abstraction technique for hardw...
Shobha Vasudevan, Vinod Viswanath, Jacob A. Abraha...