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» Plug-and-Play Architectural Design and Verification
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DAC
2010
ACM
14 years 7 months ago
A robust periodic arnoldi shooting algorithm for efficient analysis of large-scale RF/MM ICs
The verification of large radio-frequency/millimeter-wave (RF/MM) integrated circuits (ICs) has regained attention for high-performance designs beyond 90nm and 60GHz. The traditio...
Xuexin Liu, Hao Yu, Sheldon X.-D. Tan
DAC
2009
ACM
15 years 4 months ago
Information hiding for trusted system design
For a computing system to be trusted, it is equally important to verify that the system performs no more and no less functionalities than desired. Traditional testing and verifica...
Junjun Gu, Gang Qu, Qiang Zhou
PREMI
2005
Springer
15 years 3 months ago
Artificial Neural Network Engine: Parallel and Parameterized Architecture Implemented in FPGA
In this paper we present and analyze an artificial neural network hardware engine, its architecture and implementation. The engine was designed to solve performance problems of the...
Milene Barbosa Carvalho, Alexandre Marques Amaral,...
FDL
2007
IEEE
15 years 4 months ago
APDL: A Processor Description Language For Design Space Exploration of Embedded Processors
—This paper presents Anahita Processor Description Language (APDL) for generation of retargetable processor design tool sets. The emphasis is on the applicability of the generate...
Nima Honarmand, Hasan Sohofi, Maghsoud Abbaspour, ...
DAC
2002
ACM
15 years 10 months ago
High-Level specification and automatic generation of IP interface monitors
A central problem in functional verification is to check that a circuit block is producing correct outputs while enforcing that the environment is providing legal inputs. To attac...
Marcio T. Oliveira, Alan J. Hu