Sciweavers

351 search results - page 22 / 71
» Plug-and-Play Architectural Design and Verification
Sort
View
EDBT
2008
ACM
120views Database» more  EDBT 2008»
15 years 9 months ago
Schema mapping verification: the spicy way
Schema mapping algorithms rely on value correspondences ? i.e., correspondences among semantically related attributes ? to produce complex transformations among data sources. Thes...
Angela Bonifati, Giansalvatore Mecca, Alessandro P...
89
Voted
DAC
2009
ACM
15 years 1 months ago
Fast vectorless power grid verification using an approximate inverse technique
Power grid verification in modern integrated circuits is an integral part of early system design where adjustments can be most easily incorporated. In this work, we describe an ea...
Nahi H. Abdul Ghani, Farid N. Najm
DDECS
2007
IEEE
201views Hardware» more  DDECS 2007»
15 years 4 months ago
Built in Defect Prognosis for Embedded Memories
: As scan compression replaces the traditional scan it is important to understand how it works with power. DFT MAX represents one of the two primary scan compression solutions used...
Prashant Dubey, Akhil Garg, Sravan Kumar Bhaskaran...
ISIM
2007
14 years 11 months ago
Verification of Good Design Style of UML Models
Software architecture, and its behavior can be expressed as UML models. Models of complex systems can be also complex and hard to read – they may consists of hundreds of artifact...
Bogumila Hnatkowska
ASYNC
1997
IEEE
140views Hardware» more  ASYNC 1997»
15 years 1 months ago
The Design and Verification of A High-Performance Low-Control-Overhead Asynchronous Differential Equation Solver
Abstract-This paper describes the design and verification of a high-performance asynchronous differential equation solver benchmark circuit. The design has low control overhead whi...
Kenneth Y. Yun, Ayoob E. Dooply, Julio Arceo, Pete...