Sciweavers

351 search results - page 53 / 71
» Plug-and-Play Architectural Design and Verification
Sort
View
DAC
2002
ACM
15 years 10 months ago
A physical model for the transient response of capacitively loaded distributed rlc interconnects
Rapid approximation of the transient response of high-speed global interconnects is needed to estimate the time delay, crosstalk, and overshoot in a GSI multilevel wiring network....
Raguraman Venkatesan, Jeffrey A. Davis, James D. M...
DAC
2003
ACM
15 years 10 months ago
Random walks in a supply network
This paper presents a power grid analyzer based on a random walk technique. A linear-time algorithm is first demonstrated for DC analysis, and is then extended to perform transien...
Haifeng Qian, Sani R. Nassif, Sachin S. Sapatnekar
DAC
2003
ACM
15 years 10 months ago
Power grid reduction based on algebraic multigrid principles
With the scaling of technology, power grid noise is becoming increasingly significant for circuit performance. A typical power grid circuit contains millions of linear elements, m...
Haihua Su, Emrah Acar, Sani R. Nassif
90
Voted
DAC
2004
ACM
15 years 10 months ago
STAC: statistical timing analysis with correlation
Current technology trends have led to the growing impact of both inter-die and intra-die process variations on circuit performance. While it is imperative to model parameter varia...
Jiayong Le, Xin Li, Lawrence T. Pileggi
65
Voted
DAC
2004
ACM
15 years 10 months ago
Abstraction refinement by controllability and cooperativeness analysis
ion Refinement by Controllability and Cooperativeness Analysis Freddy Y.C. Mang and Pei-Hsin Ho Advanced Technology Group, Synopsys, Inc. {fmang, pho}@synopsys.com nt a new abstrac...
Freddy Y. C. Mang, Pei-Hsin Ho