142 search results - page 5 / 29 » Polymorphic On-Chip Networks |
125
Voted
HPCA
2009
IEEE
16 years 2 months ago
2009
IEEE
Driven by continuing scaling of Moore's law, chip multiprocessors and systems-on-a-chip are expected to grow the core count from dozens today to hundreds in the near future. ...
NIPS
2004
15 years 3 months ago
2004
Device mismatch in VLSI degrades the accuracy of analog arithmetic circuits and lowers the learning performance of large-scale neural networks implemented in this technology. We s...
111
Voted
ASAP
2003
IEEE
15 years 7 months ago
2003
IEEE
On-chip implementation of multiprocessor systems requires the planarization of the interconnect network onto the silicon floorplan. Manual floorplanning approaches will become i...
133
Voted
ICCD
2006
IEEE
15 years 10 months ago
2006
IEEE
— Driven by the need for higher bandwidth and complexity reduction, off-chip interconnect has evolved from proprietary busses to networked architectures. A similar evolution is o...
105
Voted
NOCS
2008
IEEE
15 years 8 months ago
2008
IEEE
Abstract— In this paper, we discuss a real-time on-chip communication service with a priority-based wormhole switching policy. A novel off-line schedulability analysis approach i...