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» Polynomial-Time Nested Loop Fusion with Full Parallelism
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ICS
2000
Tsinghua U.
13 years 10 months ago
Synthesizing transformations for locality enhancement of imperfectly-nested loop nests
We present an approach for synthesizing transformations to enhance locality in imperfectly-nested loops. The key idea is to embed the iteration space of every statement in a loop ...
Nawaaz Ahmed, Nikolay Mateev, Keshav Pingali
EUC
2005
Springer
13 years 12 months ago
Optimizing Nested Loops with Iterational and Instructional Retiming
Abstract. Embedded systems have strict timing and code size requirements. Retiming is one of the most important optimization techniques to improve the execution time of loops by in...
Chun Xue, Zili Shao, Meilin Liu, Mei Kang Qiu, Edw...
ICS
2009
Tsinghua U.
14 years 1 months ago
Parametric multi-level tiling of imperfectly nested loops
Tiling is a crucial loop transformation for generating high performance code on modern architectures. Efficient generation of multilevel tiled code is essential for maximizing da...
Albert Hartono, Muthu Manikandan Baskaran, C&eacut...
IPPS
2006
IEEE
14 years 13 days ago
Memory minimization for tensor contractions using integer linear programming
This paper presents a technique for memory optimization for a class of computations that arises in the field of correlated electronic structure methods such as coupled cluster and...
A. Allam, J. Ramanujam, Gerald Baumgartner, P. Sad...
ICCAD
2009
IEEE
179views Hardware» more  ICCAD 2009»
13 years 4 months ago
Automatic memory partitioning and scheduling for throughput and power optimization
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...
Jason Cong, Wei Jiang, Bin Liu, Yi Zou