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ACISICIS
2005
IEEE
16 years 4 days ago
An Effective Cache Overlapping Storage Structure for SMT Processors
Simultaneous Multithreaded (SMT) processors improve the instruction throughput by allowing fetching and running instructions from several threads simultaneously at a single cycle....
Liqiang He, Zhiyong Liu
BROADNETS
2005
IEEE
16 years 4 days ago
Optimal path selection for ethernet over SONET under inaccurate link-state information
— Ethernet over SONET (EoS) is a popular approach for interconnecting geographically distant Ethernet segments using a SONET transport infrastructure. It typically uses virtual c...
Satyajeet Ahuja, Marwan Krunz, Turgay Korkmaz
BROADNETS
2005
IEEE
16 years 4 days ago
Using location information for scheduling in 802.15.3 MAC
— In recent years, UWB has received much attention as a suitable Physical Layer (PHY) for Wireless Personal Area Networks (WPANS). UWB allows for low cost, low power, high bandwi...
Sethuram Balaji Kodeswaran, Anupam Joshi
CAMP
2005
IEEE
16 years 4 days ago
Speeding-up NCC-Based Template Matching Using Parallel Multimedia Instructions
— This paper describes the mapping of a recently introduced template matching algorithm based on the Normalized Cross Correlation (NCC) on a general purpose processor endowed wit...
Luigi di Stefano, Stefano Mattoccia, Federico Tomb...
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CGO
2005
IEEE
16 years 4 days ago
A General Compiler Framework for Speculative Optimizations Using Data Speculative Code Motion
Data speculative optimization refers to code transformations that allow load and store instructions to be moved across potentially dependent memory operations. Existing research w...
Xiaoru Dai, Antonia Zhai, Wei-Chung Hsu, Pen-Chung...
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