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» Post-Silicon Debug Using Programmable Logic Cores
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AGP
1998
IEEE
15 years 1 months ago
Some Design Issues in the Visualization of Constraint Logic Program Execution
Visualization of program executions has been found useful in applications which include education and debugging. However, traditional visualization techniques often fall short of ...
Manuel Carro, Manuel V. Hermenegildo
GPCE
2004
Springer
15 years 3 months ago
Taming Macros
Scheme includes a simple yet powerful macro mechanism. Using macros, programmers can easily extend the language with new kinds of expressions and definitions, thus abstracting ove...
Ryan Culpepper, Matthias Felleisen
CSREAESA
2009
14 years 10 months ago
Embedded Processor Based Fault Injection and SEU Emulation for FPGAs
Two embedded processor based fault injection case studies are presented which are applicable to Field Programmable Gate Arrays (FPGAs) and FPGA cores in configurable System-on-Chip...
Bradley F. Dutton, Mustafa Ali, Charles E. Stroud,...
MSO
2003
14 years 11 months ago
Control System Design of the CERN/CMS Tracker Thermal Screen
The Tracker is one of the CMS (Compact Muon Solenoid experiment) detectors to be installed at the LHC (Large Hadron Collider) accelerator, scheduled to start data taking in 2007. ...
Enzo Carrone, Andromachi Tsirou
SIGSOFT
2007
ACM
15 years 10 months ago
Efficient checkpointing of java software using context-sensitive capture and replay
Checkpointing and replaying is an attractive technique that has been used widely at the operating/runtime system level to provide fault tolerance. Applying such a technique at the...
Guoqing Xu, Atanas Rountev, Yan Tang, Feng Qin