178 search results - page 18 / 36 » Power Compiler: A Gate-Level Power Optimization and Synthesi... |
LCTRTS
2007
Springer
15 years 4 months ago
2007
Springer
High-performance and low-power VLIW DSP processors are increasingly deployed on embedded devices to process video and multimedia applications. For reducing power and cost in desig...
ICCAD
1996
IEEE
15 years 2 months ago
1996
IEEE
We describe an algorithm for the synthesis and optimization of interface circuits for embedded system components such as microprocessors, memory ASIC, and network subsystems with ...
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CODES
2006
IEEE
15 years 4 months ago
2006
IEEE
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
CGO
2003
IEEE
15 years 4 months ago
2003
IEEE
Dynamic optimization is emerging as a promising approach to overcome many of the obstacles of traditional static compilation. But while there are a number of compiler infrastructu...
FDL
2005
IEEE
15 years 4 months ago
2005
IEEE
Although Moore’s Law enables a huge number of components to be integrated into a single chip, design methods that will allow system architects to put the components together to ...