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VEE
2010
ACM
327views Virtualization» more  VEE 2010»
14 years 1 months ago
AASH: an asymmetry-aware scheduler for hypervisors
Asymmetric multicore processors (AMP) consist of cores exposing the same instruction-set architecture (ISA) but varying in size, frequency, power consumption and performance. AMPs...
Vahid Kazempour, Ali Kamali, Alexandra Fedorova
IPPS
2003
IEEE
13 years 11 months ago
RMIX: A Multiprotocol RMI Framework for Java
With the increasing adoption of Java for parallel and distributed computing, there is a strong motivation for enhancing the expressive elegance of the RMI paradigm with flexible ...
Dawid Kurzyniec, Tomasz Wrzosek, Vaidy S. Sunderam...
MSWIM
2009
ACM
14 years 1 months ago
The MAC unreliability problem in IEEE 802.15.4 wireless sensor networks
In recent years, the number of sensor network deployments for real-life applications has rapidly increased and it is expected to expand even more in the near future. Actually, for...
Giuseppe Anastasi, Marco Conti, Mario Di Francesco
ISVLSI
2008
IEEE
143views VLSI» more  ISVLSI 2008»
14 years 20 days ago
BTB Access Filtering: A Low Energy and High Performance Design
Powerful branch predictors along with a large branch target buffer (BTB) are employed in superscalar processors for instruction-level parallelism exploitation. However, the large ...
Shuai Wang, Jie Hu, Sotirios G. Ziavras
SIGCOMM
2006
ACM
14 years 7 days ago
Algorithms to accelerate multiple regular expressions matching for deep packet inspection
There is a growing demand for network devices capable of examining the content of data packets in order to improve network security and provide application-specific services. Most...
Sailesh Kumar, Sarang Dharmapurikar, Fang Yu, Patr...