446 search results - page 13 / 90 » Power Efficient Mediaprocessors: Design Space Exploration |
CODES
2006
IEEE
15 years 3 months ago
2006
IEEE
Real-time multi-media applications are increasingly being mapped onto MPSoC (multi-processor system-on-chip) platforms containing hardware-software IPs (intellectual property) alo...
SBACPAD
2008
IEEE
15 years 4 months ago
2008
IEEE
Transactional memory is emerging as a parallel programming paradigm for multi-core processors. Despite the recent interest in transactional memory, there has been no study to char...
ISVLSI
2007
IEEE
15 years 3 months ago
2007
IEEE
In this paper, the problem of sizing MOS Current Mode Logic (MCML) circuits is addressed. The Pareto front is introduced as a useful analysis tool to explore the design space of e...
ICCD
2003
IEEE
15 years 6 months ago
2003
IEEE
This paper investigates some power efficient data cache designs that try to significantly reduce the cache energy consumption, both static and dynamic, with a minimal impact in pe...
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VLSI
2012
Springer
13 years 5 months ago
2012
Springer
e technique is based on abstract execution profiles, called event signatures, and it operates at a higher level of abstraction than, for example, commonly used instruction-set sim...