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» Power Efficient Mediaprocessors: Design Space Exploration
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EUC
2006
Springer
15 years 1 months ago
Co-optimization of Performance and Power in a Superscalar Processor Design
Abstract. As process technology scales down, power wall starts to hinder improvements in processor performance. Performance optimization has to proceed under a power constraint. Th...
Yongxin Zhu, Weng-Fai Wong, Stefan Andrei
INFOCOM
2005
IEEE
15 years 3 months ago
IPStash: a set-associative memory approach for efficient IP-lookup
—IP-Lookup is a challenging problem because of the increasing routing table sizes, increased traffic, and higher speed links. These characteristics lead to the prevalence of hard...
Stefanos Kaxiras, Georgios Keramidas
FDL
2004
IEEE
15 years 1 months ago
SystemC and OCAPI-xl Based System-Level Design for Reconfigurable Systems-on-Chip
Reconfigurability is becoming an important part of System-on-Chip (SoC) design to cope with the increasing demands for simultaneous flexibility and computational power. Current ha...
Kari Tiensyrjä, Miroslav Cupák, Kostas...
TVLSI
1998
109views more  TVLSI 1998»
14 years 9 months ago
Power estimation of embedded systems: a hardware/software codesign approach
— The need for low-power embedded systems has become very significant within the microelectronics scenario in the most recent years. A power-driven methodology is mandatory duri...
William Fornaciari, Paolo Gubian, Donatella Sciuto...
BROADNETS
2004
IEEE
15 years 1 months ago
Power Efficient Broadcast Scheduling with Delay Deadlines
In this paper, we present a framework for the design of minimal power schedulers that satisfy average packet delay bounds for multiple users in a Gaussian wireless broadcast chann...
Dinesh Rajan, Ashutosh Sabharwal, Behnaam Aazhang