446 search results - page 21 / 90 » Power Efficient Mediaprocessors: Design Space Exploration |
68
Voted
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
— MPSoC is evolving towards processor-pool (PP)-based architectures, which employ hierarchical on-chip network for inter- and intra-PP communication. Since the design space of PP...
ICCAD
2009
IEEE
14 years 7 months ago
2009
IEEE
In a behavioral synthesis system, a typical approach used to guide the scheduler is to impose hard constraints on the relative timing between operations considering performance, a...
108
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SLIP
2004
ACM
15 years 3 months ago
2004
ACM
Interconnect power is dynamic power dissipation due to switching of interconnection capacitances. This paper describes the characterization of interconnect power in a state-of-the...
51
Voted
ASPDAC
2004
ACM
15 years 3 months ago
2004
ACM
— In deep-submicron (DSM) technology, minimizing power consumption of a bus is one of the most important design objectives in embedded system-on-chip (SoC) design. In this paper,...
ISSS
2002
IEEE
15 years 2 months ago
2002
IEEE
We propose a high-level analytical model for estimating the energy and/or power dissipation in VLSI processor (systolic) array implementations of loop programs, particularly for i...