446 search results - page 22 / 90 » Power Efficient Mediaprocessors: Design Space Exploration |
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TVLSI
2008
2008
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors
14 years 9 months ago
During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...
ASPDAC
2008
ACM
14 years 11 months ago
2008
ACM
Abstract-- Increasing delay and power variation are significant challenges to the designers as technology scales to the deep sub-micron (DSM) regime. Traditional module selection t...
89
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IEEECIT
2005
IEEE
15 years 3 months ago
2005
IEEE
In embedded systems, performance and power are important inter-related issues that cannot be decoupled. Expensive and extensive simulations in a processor design space are usually...
ISSS
2000
IEEE
15 years 2 months ago
2000
IEEE
Efficient use of an optimized custom memory hierarchy to exploit temporal locality in the memory accesses on array signals can have a very large impact on the power consumption i...
ASPDAC
1998
ACM
15 years 1 months ago
1998
ACM
Binary decision diagrams (BDDs) have been shown to be a powerful tool in formal verification. Efficient BDD construction techniques become more important as the complexity of proto...