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» Power Efficient Mediaprocessors: Design Space Exploration
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ISPASS
2007
IEEE
15 years 4 months ago
Modeling and Characterizing Power Variability in Multicore Architectures
Parameter variation due to manufacturing error will be an unavoidable consequence of technology scaling in future generations. The impact of random variation in physical factors s...
Ke Meng, Frank Huebbers, Russ Joseph, Yehea I. Ism...
IJES
2008
130views more  IJES 2008»
14 years 9 months ago
Deriving efficient control in Process Networks with Compaan/Laura
: At Leiden Embedded Research Center (LERC), we are building a tool chain called Compaan/Laura that allows us to map rapidly and efficiently signal processing applications written ...
Steven Derrien, Alexandru Turjan, Claudiu Zissules...
83
Voted
ICIP
2009
IEEE
14 years 7 months ago
A contrario hierarchical image segmentation
Hierarchies are a powerful tool for image segmentation, they produce a multiscale representation which allows to design robust algorithms and can be stored in tree-like structures...
Juan Cardelino, Vicent Caselles, Marcelo Bertalm&i...
DAC
1998
ACM
15 years 1 months ago
Synthesis of Power-Optimized and Area-Optimized Circuits from Hierarchical Behavioral Descriptions
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
Ganesh Lakshminarayana, Niraj K. Jha
ICCAD
2009
IEEE
121views Hardware» more  ICCAD 2009»
14 years 7 months ago
MOLES: Malicious off-chip leakage enabled by side-channels
Economic incentives have driven the semiconductor industry to separate design from fabrication in recent years. This trend leads to potential vulnerabilities from untrusted circui...
Lang Lin, Wayne Burleson, Christof Paar