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» Power Efficient Mediaprocessors: Design Space Exploration
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VLSID
2005
IEEE
102views VLSI» more  VLSID 2005»
15 years 10 months ago
Integrated On-Chip Storage Evaluation in ASIP Synthesis
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar
MICRO
2007
IEEE
115views Hardware» more  MICRO 2007»
15 years 4 months ago
Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0
A significant part of future microprocessor real estate will be dedicated to L2 or L3 caches. These on-chip caches will heavily impact processor performance, power dissipation, a...
Naveen Muralimanohar, Rajeev Balasubramonian, Norm...
DT
2006
113views more  DT 2006»
14 years 9 months ago
A Platform-Based Taxonomy for ESL Design
the abstraction level at which designers express systems, enabling new levels of design reuse, and providing for design chain integration ool flows and abstraction levels. The purp...
Douglas Densmore, Roberto Passerone
ASPLOS
2010
ACM
15 years 1 months ago
Micro-pages: increasing DRAM efficiency with locality-aware data placement
Power consumption and DRAM latencies are serious concerns in modern chip-multiprocessor (CMP or multi-core) based compute systems. The management of the DRAM row buffer can signif...
Kshitij Sudan, Niladrish Chatterjee, David Nellans...
BMCBI
2010
193views more  BMCBI 2010»
14 years 4 months ago
Mayday - integrative analytics for expression data
Background: DNA Microarrays have become the standard method for large scale analyses of gene expression and epigenomics. The increasing complexity and inherent noisiness of the ge...
Florian Battke, Stephan Symons, Kay Nieselt